Flash memories are commonly employed in a wide variety of computer systems to provide nonvolatile information storage. Conventional flash memories typically include program circuitry for programming information into the flash memory cells as well as erase circuitry for erasing the memory cells. However, the voltage levels required by such program and erase circuitry differ from the power supply voltage levels that are typically available from a computer system power supply voltage.
Some flash memories require multiple voltage supplies to accommodate the program and erase circuitry. For example, any flash memory requires a power supply voltage and a separate high voltage for the program circuitry. Unfortunately, such a requirement of dual voltage supplies typically increases the complexity of power system design for computer systems that employ such dual supply flash memories and increases the overall cost of such systems.
On the other hand, single power supply flash memories commonly contain specialized circuitry that generates the appropriate voltage levels and electrical current levels required to program and erase the individual flash memory cells. For example, such flash memories typically include charge pump circuitry that converts a single electrical supply voltage into the appropriate voltage level required to drive the inputs to the flash memory cells during programming.
More recent computer systems, such as portable computers, employ integrated circuits and other devices that function with relatively low power supply voltage levels in comparison to earlier systems. For example, conventional notebook computer systems that employed 5V power supply voltage are now evolving toward 3V or lower power supply voltages (for example, 2V or 1.5V).
Unfortunately, such low levels of electrical power supply voltages impose a practical limit on the amount of electrical programming current that can be generated by charge pump circuitry on the flash memory. Such a limit on available programming current may reduce the overall speed of such flash memories by limiting the number of flash cells that can be programmed simultaneously.
Theoretically, a larger and more complex implementation of charge pump circuitry would provide the necessary electrical current required to program entire bytes or words of flash memory cells simultaneously. If the voltage level of the power supply voltage is further reduced, for example, if it is lowered below 2V, the charge pump circuitry becomes much more complicated and much larger. Such large and complex charge pump circuitry consumes large areas of an integrated circuit die. Such large amounts of integrated circuit die space dedicated to charge pump typically reduces the area available for flash memory cells and associated access circuitry, which thereby limits the overall storage capacity of such a flash memory. On the other hand, such large amounts of die space may require a significant increase in the overall size of the integrated circuit die which increases manufacturing costs.